IBM recently announced in Kyoto, Japan that the company’s research team has made a huge breakthrough in the manufacture of transistors – from integrating 20 billion 7-nm transistors to 30 billion 5-nanometer transistors on a nail-sized chip. According to the report of the Institute of Electrical and Electronics Engineers (IEEE) "Spectrum" on the 6th, this outstanding performance is expected to save Moore's Law, which is at the limit, so that electronic components will continue to develop in a smaller and more economical direction. The current state-of-the-art transistor is the finFET, named after the fin-shaped bulge of the sulfur-bearing silicon projected on the surface of the chip. The key to its revolutionary breakthrough is to control the current transfer in three-dimensional structures rather than two-dimensional planes. This design can be applied to 10 nm or even 7 nm node chips. However, as the chip size gets smaller and smaller, the current becomes increasingly difficult to shut down. Even with this advanced three-sided “gate†structure, electron leakage can still occur. The semiconductor industry has been working to create alternatives to 5-nanometer nodes. In the latest architecture announced by IBM, each transistor consists of three layers of stacked horizontal slices, each only a few nanometers thick, completely surrounded by the grid, preventing electron leakage and saving power. structure. Max Kayle, vice president of semiconductor technology and research at IBM, said, "We think that the new structure will become the universal structure following the finFET," and it represents the future of transistors. According to the report, IBM spent many years researching and manufacturing process technology and materials for stacking nano-chips. The popular electron beam lithography process was too expensive for mass production, and the upcoming production of 5-nanometer chips would reduce the use of process costs. Aurora UV Lithography. Although the new chip is only the size of a fingernail, it can integrate 30 billion transistors. Compared with 10 nanometer chips, the new chip shows that at a given power, its performance can be increased by 40%; at the same efficiency, 5 nanometer chips 74% energy savings. IBM plans to work with Samsung and global manufacturers to produce 5-nanometer node test chips and provide them to global customers to meet the growing market demand in the coming years, paving the way for the realization of autonomous driving, artificial intelligence and 5G networks. (Reporter Fang Linlin)
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